1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device including a sensing control signal generation unit.
2. Description of the Related Art
Semiconductor memory devices are basically divided into volatile and nonvolatile memory devices.
A volatile memory device has faster read and write speeds, but data stored therein is lost when the power supply to the device is disconnected. A nonvolatile memory device has relatively slower read and write speeds, but retains data stored therein even when the power supply to the device is stopped. Accordingly, a nonvolatile memory device is used to store data that needs to be retained regardless of whether the power supply is on or off. Examples of a nonvolatile memory device include read only memory (ROM), mask ROM (MROM) programmable ROM (PROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, phase change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), and ferroelectric (RAM FRAM). The flash memory is widely used and is categorized into NOR and NAND flash memories.
A NAND flash memory has the advantage of RAM in that data can be freely programmed and erased and an advantage of a ROM in that stored data can be retained although the supply of power is stopped. Flash memory is widely used as the storage media of portable electronic devices, such as, for example, a digital camera, a personal digital assistant (PDA), and an MP3 player.
NAND flash memory typically includes a plurality of page buffers coupled to a plurality of bit lines in a one-to-one way through a sensing node. During a program operation, the page buffers are able to detect voltages of corresponding bit lines through the sensing node. When all of the memory cells coupled to a specific word line are to be programmed, a program permission voltage, for example, a ground voltage VSS is applied to all of the bit lines, and thus the voltage of the sensing node is driven to the ground voltage VSS. In contrast, when a program prohibition voltage, for example, a core voltage VCORE is applied to all of the bit lines, a voltage of the sensing node is driven to the core voltage VCORE. In this case, since voltages of all of the bit lines are changed at the same time, the peak current of the semiconductor memory device is increased.